The present invention relates to an improved C49-structured titanium salicide structure in semiconductor device, and method of forming the same.
Titanium is the most attractive refractory metal for silicidation reaction process as titanium silicide has a lowest electrical resistivity in any refractory metal silicides and improvement and development in titanium silicide are most important and receive a great deal of attention in the silicidation techniques.
A conventional method of forming titanium salicide structure over a silicon substrate will be described with reference to FIGS. 1A through 1E which are fragmentary cross sectional elevation views illustrative of fabrication processes for fabricating CMOS transistors having a titanium salicide structure over a silicon substrate.
With reference to FIG. 1A, an n-well region 2 is selectively formed in a p-type silicon substrate 1 by an ion-implantation of n-type impurity. Field oxide films 3 are selectively formed on a surface of the silicon substrate 1 by a local oxidation of silicon method. The filed oxide films 3 have a thickness of 300 nanometers. The filed oxide films 3 surround active regions on the n-well region 2 and the surface region of the p-type silicon substrate 1. Gate oxide films 4 are formed on the active regions on the n-well region 2 and the surface region of the p-type silicon substrate 1. The gate oxide films 4 have a thickness of 6 nanometers. A polysilicon film having a thickness of 150 nanometers is entirely formed, which extends over the field oxide films 3 and the gate oxide films 4. The polysilicon film is patterned by a photo-lithography method and a subsequent dry etching method to form gate electrodes 5 on the gate oxide films 4 formed on the active regions on the n-well region 2 and on the surface region of the p-type silicon substrate 1. By use of photo-lithography, an ion-implantation mask is formed over the n-well region 2 before lightly n-doped diffusion layers 14 are formed in the surface region of the silicon substrate 1 by ion-implantation of n-type impurity in self-alignment. The ion-implantation mask is removed and thereafter by use of the photo-lithography, another ion-implantation mask is formed over the surface region of the silicon substrate 1 before lightly p-doped diffusion layers 15 are formed in the surface region of the n-well region 2 by ion-implantation of p-type impurity in self-alignment. The other ion-implantation mask is removed. As a modification, it is, of course, available that the lightly p-doped diffusion layers 15 have been formed before the lightly n-doped diffusion layers 14 are formed. A silicon oxide film having a thickness of 70 nanometers is entirely formed which extends over the filed oxide films 3, the lightly n-doped diffusion layers 114, the lightly p-doped diffusion layers 15 and the gate electrodes 5. The silicon oxide film is then selectively removed by an etch back method to form side wall oxide films 6 at opposite sides of each of the gate electrodes 5.
With reference to FIG. 1B, still another ion-implantation mask is formed over the surface region of the n-well region 2 and the gate electrode 5 over the n-well region 2, before ion-implantation of p-type impurity into the surface region of the surface region of the silicon substrate 1 as well as into the gate electrode 5 over the surface region of the silicon substrate 1 are carried out by self-alignment technique to thereby form an n-type polysilicon gate electrode 9 over the silicon substrate 1 and n-type source/drain diffusion layers 7 in the surface region of the silicon substrate 1. After the still other ion-implantation mask is removed, yet another ion-implantation mask is formed over the surface region of the silicon substrate 1 and the gate electrode 5 over the silicon substrate 1. Ion-implantation of p-type impurity into the n-well region 2 as well as into the gate electrode 5 over the n-well region 2 are carried out by self-alignment technique to thereby form a p-type polysilicon gate electrode 10 over the n-well region 2 and p-type source/drain diffusion layers 8 in the surface region of the n-well region 2. As a modification, it is, of course, possible that the p-type polysilicon gate electrode 10 and the p-type source/drain diffusion layers 8 have been formed before the n-type polysilicon gate electrode 9 and the n-type source/drain diffusion layers 7 are formed. Subsequently, the silicon substrate 1 is subjected to a heat treatment at a temperature of 900.degree. C. for 20 minutes in a nitrogen atmosphere for recovery from crystal defects caused by ion-implantation and for activation of impurity doped thereinto. As a result, n-type source/drain diffusion layers 7 with lightly doped drain structure and p-type source/drain diffusion layers 8 with lightly doped drain structure are formed.
Spontaneous oxide films are removed by diluted fluorine acid solution from surfaces of the n-type and p-type polysilicon gate electrodes 9 and 10 as well as from surfaces of the n-type source/drain diffusion layers 7 and the p-type source/drain diffusion layers 8. Subsequently, a titanium film 11 is entirely deposited by sputtering a target of titanium. The titanium film 11 extends over the field oxide films 3, the n-type and p-type source/drain diffusion layers 7 and 8, the n-type and p-type polysilicon gate electrodes 9 and 10 and the side wall oxide films 6.
With reference to FIG. 1C, the silicon substrate 1 is subjected to a rapid thermal annealing at a temperature of 700.degree. C. in a nitrogen atmosphere to cause silicidation reactions. The titanium film 11 in contact with the n-type and p-type source/drain diffusion layers 7 and 8 and the n-type and p-type polysilicon gate electrodes 9 and 10 shows silicidation reactions of titanium and tungsten with silicon or polysilicon. As a result, C49-structured titanium silicide films 12 are provided in self-alignment or salicidation technique so that the C49-structured titanium silicide films 12 extend over the n-type and p-type source/drain diffusion layers 7 and 8 and the n-type and p-type polysilicon gate electrodes 9 and 10. On the other hand, the titanium film 11 in contact with the field oxide films 3 and the side wall oxide films 6 as well as a surface region of the titanium film 11 show nitration reaction of titanium and tungsten with nitrogen. As a result, a titanium nitride film 13 is provided, which extends over the field oxide films 3 and the side wall oxide films 6 as well as over a surface of the C49-structured titanium silicide film 12.
With reference to FIG. 1D, only the titanium nitride films 13 are removed from the field oxide films 3 and the side wall oxide films 6 by a wet etching with a mixing solution of ammonia water and hydrogen peroxide water. The substrate is then subjected to a rapid thermal anneal at a temperature of 800.degree. C. to cause a phase transition from C49-structure into C54-structure whereby the C49-structured titanium silicide film 12 is made into a C54-structured titanium silicide film 16. The C54-structured titanium silicide film 16 is lower in sheet resistance than the C49-structured titanium silicide film 12.
With reference to FIG. 1E, a first inter-layer insulator 17 made of silicon oxide is entirely deposited which extends over the C54-structured titanium silicide film 16, the field oxide films 3 and the side wall oxide films 6. Subsequently, a second inter-layer insulator 18 made of silicon oxide containing impurity such as boron or phosphorus is deposited over the first inter-layer insulator 17. The first and second inter-layer insulators 17 and 18 are annealed by a furnace-anneal at a temperature of 800.degree. C. The C54-structured titanium silicide films 16, however, show deformations into islands. As a result, the C54-structured titanium silicide films 16 vary in thickness and in sheet resistance. The averaged sheet resistance of the C54-structured titanium silicide films 16 post-annealed at 800.degree. C. is increased.
In order to solve those problems, it was proposed to introduce oxygen and boron into the titanium silicide film by ion-implantation before titanium oxide and titanium borate are formed by post-anneal. Those techniques are disclosed in Japanese laid-open patent publication No. 3-80542 and reported in a meeting of Japan Applied Physics Society held in Autumn 1995.
However, the heat resistance of such titanium silicide film containing titanium oxide and/or titanium borate is insufficient.
It was known that, since C49-structured titanium silicide has a higher resistivity than C54-structured titanium silicide, in order to reduce a resistivity, it is effective to carry out a rapid thermal anneal at a high temperature of not less than 800.degree. C. to cause a phase transition of C49-structure into C54-structure. The C54-structured titanium silicide has a larger grain size than the C49-structured titanium silicide. On the other hand, the C54-structured titanium silicide has a larger crystal grain size than the C49-structured titanium silicide the C54-structure, whilst the C54-structured titanium silicide titanium silicide has a lower heat resistance than the C49-structured titanium silicide. If the crystal grain size is increased, then the heat resistance is decreased. The C54-structured titanium silicide is more than 10 times larger in crystal grain size than the C49-structured titanium silicide. This means that the C54-structured titanium silicide is much inferior in heat resistance than the C49-structured titanium silicide. This was reported and is disclosed in Journal of Applied Physics 72(2), 15 January 1992, pp. 720-724.
FIG. 2 is a photograph taken by transmission electron microscope and illustrative of C49-structure crystal grains and co-existent C54-structure crystal grains during a phase transition from C49-structure into C54-structure caused by a rapid thermal anneal at a temperature of 650.degree. C. for 30 seconds after a titanium film of 40 nanometers in thickness has been deposited on amorphous silicon. Small crystal grains with fine stripe patterns caused by plane lattice defects or staking faults correspond to C49-structured crystal grains, whilst large crystal grains correspond to C54-structured crystal grains. If, in such case, the titanium film is deposited on amorphous silicon, a titanium silicidation reaction may be caused by a relatively low temperature. This was reported and is disclosed in Material Research Society Symposium Proceedings 1990 Vol. 181, pp. 167-172.
By the way, the titanium silicide structure or the titanium salicide structure may be applied to a semiconductor device such as MOS field effect transistor. In this case, after the titanium salicide structure has been formed over a silicon substrate, an inter-layer insulator is deposited over the titanium salicide structure and then the substrate or inter-lay insulator is subjected to an anneal at a high temperature of, for example, not less than 800.degree. C. If, in order to obtain a reduced resistivity, the C54-structured titanium silicide were once formed over silicon or polysilicon regions over the silicon substrate, then the C54-structured titanium silicide is subjected to the anneal at a high temperature of not less than 800.degree. C. Since, however, C54-structured titanium silicide film is inferior in heat resistance, the C54-structured titanium silicide film is likely to be deformed into islands or to be made largely vary in thickness. As a result, the deformed C54-structured titanium silicide film largely varies in sheet resistance. Particularly when the C54-structured titanium silicide film is used as a fine-structured interconnection having a reduced width, then the problems with deformation of the C54-structured titanium silicide film into the island like shape and with the variation in sheet resistance of the deformed C54-structured titanium silicide film would be more serious.
In the above circumstances, it had been required to develop a novel titanium silicide film which has a high heat-resistance and a low sheet resistance.